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XCFxxS Platform Flash PROM Block Diagram


In-System Programmable PROMs for Configuration of
Xilinx® FPGAs

  • Low-Power Advanced CMOS NOR Flash Process
  • Endurance of 20,000 Program/Erase Cycles
  • Operation over Full Industrial Temperature Range
    (–40°C to +85°C)
  • IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)
    Support for Programming, Prototyping, and Testing
  • JTAG Command Initiation of Standard FPGA
  • Cascadable for Storing Longer or Multiple Bitstreams
  • Dedicated Boundary-Scan (JTAG) I/O Power Supply (VCCJ)
  • I/O Pins Compatible with Voltage Levels Ranging From
    1.8V to 3.3V
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